1. Field of the Invention
The present invention relates to electronic circuits and, more specifically, to a design structure on which a current mirror circuit resides.
2. Description of the Prior Art
In electronic semiconductors, silicon-on-insulator (SOI) structures are used for isolating complementary MOS (CMOS) transistors from a substrate. An SOI structure employs a layer of insulating material (such as a silicon dioxide layer) close to the surface of a silicon substrate, thereby isolating a layer of substrate silicon from the main substrate body below. A CMOS transistor can then be fabricated on the isolated substrate silicon layer above the insulating layer. Since the area for fabricating the CMOS transistor is isolated from the substrate main body, certain conventional latch-up paths will be excluded. For example, conventional latch-up paths such as “source terminal to the substrate” and “well region to the substrate” no longer exist due to the isolation provided by this insulating layer. SOI CMOS devices often operate at higher speeds than do bulk CMOS devices.
Many electronic circuits, such as digital logic circuits, employ silicon-on-insulator (SOI) technology. SOI technology can be used to increase integrated circuit speed while reducing power consumption. However, maintaining an acceptable body contact resistance in SOI field effect transistor (FET) devices can raise the device threshold voltage (Vth) in such devices. A raised device threshold voltage Vth can cause supply voltage headroom problems.
A current mirror is a circuit in which a reference current from a current source is replicated for use by other circuit elements. As shown in FIG. 1, existing current mirrors employ a reference transistor 12 to draw a reference current (iref) from a current source 10. There is typically a voltage drop (vref) across the current source 10, which gives rise to a reference voltage (nbias) that is used to bias the gate of the reference transistor 12. The reference voltage is also used to bias the gates of subsequent transistors 14 that then draw a current corresponding to the current flowing through the reference transistor 12. Thus, each subsequent transistor 14 regulates the current flowing through a circuit load 16 so as to correspond to the reference current (iref).
A common problem in low supply voltage current mirror designs (e.g., designs embodied with SOI technology) is acquiring enough current source headroom. This necessitates the need to reduce the threshold voltage of the current source device and hence the gate-to-source voltage (Vgs) of the device for increased current source headroom. One method of accomplishing this is to tie the gate of the current mirror to its body. However, this often leads problems in avoiding excessive body forward biasing which results in increased body forward bias current and hence incorrect current mirroring. To ensure both adequate headroom and correct current mirroring, the mirror current should be mainly a function of Vgs and not of the resultant bipolar current of the device as the body bias and Vds become large.
Therefore, there is a need for a low voltage current mirror device that maintains adequate current source headroom.